[PTLsim-devel] Internal Loads / Stores (LDP / STP) vs. cache hierarchy

Fri Jul 6 09:05:18 EDT 2007

> I'm not quite sure, whether my idea is okay, as (again) I'm not too
> confidend about treatment of the forwarding buffers and such.
>
> If someone could please have a look at the patch and comment on its sanity?

I found some bugs with parameter ordering, see the revised patch for internal 
stores attached.

Thanks,
  Stephan

-- 
Stephan Diestelhorst, AMD Operating System Research Center
stephan.diestelhorst at amd.com, Tel.   (AMD: 8-4903)
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