[PTLsim-devel] how to enter & leave simulation mode from the program?

Wed May 16 09:51:27 EDT 2007

Matt T. Yourst wrote:
> problem is that you need to use -DPTLSIM_HYPERVISOR on the compiler 
> command line used to compile your program. The code below is trying to 
> use the userspace-only method of accessing PTLsim, which won't work 
> with the full system version (in this version, we use a real x86 
> instruction opcode 0x0f37 to do the call).
>
> Read the rest of my earlier e-mail for details.
>
>   
Ok, this helped to some point... thanks!
It started complaining about some includes etc etc etc
what I figured out is that I'm using gcc and not g++ and therefore can't 
compile with ptlcalls.h as include, so I had to, instead, link with 
ptlcalls.o,
(I've created a new .h file containing "extern W64 ptlcall_..." lines, 
included that .h file in my source code, and I could start and stop the 
simulation from withing the sourcecode).
Anyway, I haven't seen a way to switch the "core" that is executing, 
with any of the offered functions, so I wrapped my own:

I've created a new C export-ed functions called:
 W64 ptlcall_custom__(const char *cmd) { return 
ptlcall_single_flush(cmd); }
 W64 ptlcall_custom_(const char *cmd) { return ptlcall_single_flush(cmd); }
in the file ptlcalls.c, just after the offered exports,
included that function too in the myptlcalls.h (my header file with 
extern-s)
and now I can call the ptlctl directly from source:

ptlcall_custom__("-core ooo -stopinsns inf -run");
or
ptlcall_custom__("-core seq -stopinsns inf -run");

anyway, another issue is raised...
I have difficulties returning to "native" mode.
Maybe that's becuase the "distance" between this ptlcall and 
ptlcall_switch_to_native() is too small. I guess it needs some time to 
"flush" the command to the hypervisor?
I get the same results if I use:
   ptlcall_switch_to_native();
or
   ptlcall_custom("-native");

the console printout is:
________
//
//  PTLsim: Cycle Accurate x86-64 Full System SMP/SMT Simulator
//  Copyright 1999-2007 Matt T. Yourst <yourst at yourst.com>
//
//  Revision 217 (2007-03-18)
//  Built May 16 2007 13:59:03 on dell02.bsc.es using gcc-4.1
//  Running on dell02.
//

Waiting for request...
Processing -domain 47 -native
System Information:
 Running on hypervisor version xen-3.0-x86_64 xen-3.0-x86_32p -
 Xen is mapped at virtual address 0xffff800000000000
 PTLsim is running across 4 VCPUs:
 Physical CPU type: Intel Pentium 4 EM64T
 VCPU 0 core frequency: 3191 MHz
 Physical CPU affinity for all VCPUs: all
Memory Layout:
 System:                8650752 pages,   34603008 KB
 Domain:                  65536 pages,     262144 KB
 PTLsim reserved:         32768 pages,     131072 KB
 Page Tables:               356 pages,       1424 KB
 PTLsim image:              559 pages,       2236 KB
 Heap:                    31853 pages,     127412 KB
 Stack:                     256 pages,       1024 KB
Interfaces:
 PTLsim page table:     2490323
 Shared info mfn:          3520
 Shadow shinfo mfn:     2445709
 PTLsim hostcall:                event channel   15
 PTLsim upcall:                  event channel   16

 Switched to native mode
Breakout request received from native mode
 Switched to simulation mode
Returned from switch to native: now back in sim
Waiting for request...
Processing -core ooo -run
Switching to simulation core 'ooo'...
Stopping after 9223372036854775807 commits
 Completed             0 cycles,             0 commits:         0 
cycles/sec,         0, insns/sec: rip 0x4044dd 0xffffffff802063aa 
0xffffffff802063aa 0xffffffff802  Completed         25745 
cycles,         18433 commits:    128718 cycles/sec,     92160, 
insns/sec: rip 0x4070b0 0xffffffff804342fd 0xffffffff8022d26d 
0xffffffff802  Completed         34225 cycles,         63387 
commits:     42398 cycles/sec,    224762, insns/sec: rip 
0xffffffff8025bdc5 0xffffffff804342fd 0xffffffff8022cfa6 0xf
...
________

but the ptlsim.log contents don't have 'native':
________
...
VCPU 3:
 base_tsc:                   1874781996475712
 sim_cycle:                                 0
 rdtsc (virtualized):        1874781996475712
 rdtsc (physical):           1874782004748112
 system_time (virtual):       587336356931468
 system_time (physical):      587336923674246
Interrupt mappings:
 vcpu 0: virq 0 -> port 3
 - Timer virq: mask and generate internally
 vcpu 1: virq 0 -> port 8
 - Timer virq: mask and generate internally
 vcpu 2: virq 0 -> port 11
 - Timer virq: mask and generate internally
 vcpu 3: virq 0 -> port 14
 - Timer virq: mask and generate internally
Timer interrupts will be delivered every 1/100 sec = every 31919993 cycles
Summary of event channels:
 Port    1: inter    -> vcpu 0, remote domain 0, remote port 43
 Port    2: inter    -> vcpu 0, remote domain 0, remote port 48
 Port    3: virq     -> vcpu 0, virq 0
 Port    4: ipi      -> vcpu 0
 Port    5: ipi      -> vcpu 0
 Port    6: ipi      -> vcpu 1
 Port    7: ipi      -> vcpu 1
 Port    8: virq     -> vcpu 1, virq 0
 Port    9: ipi      -> vcpu 2
 Port   10: ipi      -> vcpu 2
 Port   11: virq     -> vcpu 2, virq 0
 Port   12: ipi      -> vcpu 3
 Port   13: ipi      -> vcpu 3
 Port   14: virq     -> vcpu 3, virq 0
 Port   15: inter    -> vcpu 0, remote domain 0, remote port 70
 Port   16: inter    -> vcpu 0, remote domain 0, remote port 74
 Port   17: inter    -> vcpu 0, remote domain 0, remote port 75
 Port   18: inter    -> vcpu 0, remote domain 0, remote port 76
Initializing core 'ooo'
Switching to simulation core 'ooo'...
Stopping after 9223372036854775807 commits
Starting out-of-order core toplevel loop
Completed             0 cycles,             0 commits:         0 
cycles/sec,         0, insns/sec: rip 0x4044dd 0xffffffff802063aa 
0xffffffff802063aa 0xffffffff80206
3aa
Completed         25745 cycles,         18433 commits:    128718 
cycles/sec,     92160, insns/sec: rip 0x4070b0 0xffffffff804342fd 
0xffffffff8022d26d 0xffffffff80208
d82
...
________

I'm probably doing something wrong here...

-- 
Saša Tomić
BSC - Barcelona SuperComputing Center
c\ Jordi Girona 29, Nexus I, 08034 Barcelona, España
Tel.: ,  
http://www.bsc.es

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