[PTLsim-devel] translation of lea op

Tue Oct 16 16:46:04 EDT 2007

On Tuesday 16 October 2007 09:59, Indu Bhagat wrote:
> I have a question related to the decoder functionality in PTLsim. I was
> looking at some instances of the lea x86 instruction which in binary
> exist as :
>
>  400b89:   4c 8d 5a 02             lea    0x2(%rdx),%r11
> ...
> 1. What is the significance of "imm_is_not_encodable" as it checks
> (apart from checking whether imm is 64 or 32 bits appropriately for
> mem/non-mem operations) and another condition like
> lowbits(memref.mem.offset, memref.mem.size) which is 2 in this case,
> btw, which makes imm_is_not_encodable = 1 in this specific case.
>
> 2. However, I am not too sure...is there some other reason why this
> extra operation is being generated? Ideally one would like only a single
> operation to be generated for this case.
>

Most real processors do not reserve a full 64-bit field in the uop encoding 
for immediates. This code is used to represent that limitation - typically 
the limit is 8 bits or 16 bits on most Intel and AMD chips. I think it's 16 
bits in the Pentium 4 Northwood uop format in the trace cache, and 16 bits in 
AMD K8 uops (this is the format used in the microcode arrays - the internal 
format in the pipeline may be larger, up to 64 bits).

- Matt

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 Matt T. Yourst                    yourst at peptidal.com
 Peptidal Research Inc., Co-Founder and Lead Architect
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