[PTLsim-devel] PTLSim on AMD-64
Adnan Khaleel
Wed Apr 16 11:13:16 EDT 2008
Hi Kanad,
I'm really interested in the QEMU integration. I had talked with Matt about this several months ago especially since I couldn't use the Xen integration in my environment - not that it was unfeasible but just impractical.
Can you give me more details about the project and any areas where I can possibly assist?
Thanks
Adnan
Cray Inc
_____
From: Kanad Ghose [mailto:ghose at cs.binghamton.edu]
To: Stephan Diestelhorst [mailto:stephan.diestelhorst at gmail.com]
Cc: ptlsim-devel at ptlsim.org
Sent: Wed, 16 Apr 2008 08:35:57 -0500
Subject: Re: [PTLsim-devel] PTLSim on AMD-64
Actually, we have a fairly reasonable *true* multicore simulator
(mptlsim) with detailed models of interconnection and a few cache coherence
protocols. These are all cycle accurate, including the variant that
has no support for cache coherency (the memory interface of ptlsim was
modfied drastically.) Hui Zeng is the architect/designer for this version
and we will have a public release very soon. (What we have is fairly
stablebut more documentation and testing are needed prior to the
public release. This version supports up to 2 levels of private, coherent
caches.
We are also working on a QEMU port and adding features to model
pertpherals, bridges etc. If any one else is working on the QEMU
port, please let us know, so that we can work together or benefit from
each other's experience.
Our thanks for who have taken an interest in ptlsim and used it.
-Kanad
On Wed, 16 Apr 2008, Stephan Diestelhorst wrote:
>> The problem was instability, with multicore FullSystem simulations.
>
> There was one major problem with multi-threaded / multi-core simulation:
> The atomic RMW instructions (which are used to realise mutexes, locks and
> other similar constructs e.g. inside the linux kernel, libc and
> pthreads) were not
> actually atomic. I've sent a patch for that quite a while ago, which fixed most
> of my instabilities in the past.
>
> In addition to that, there are serious stability issues when switching back and
> forth between simulation and native execution. Matt has once suggested that
> this might be due to races between the hypervisor taking over and PTLsim
> releasing the once simulated core "into the wild".
>
>> Anyway, this problem will probably last while PTLSim is bounded to Xen. We
>> hope that will change soon.
>
> I'm again working on PTLsim now, and fixing this issue is on my list of things.
> At some point Matt had a developer position available for someone who would
> port PTLsim to use QEMU (or KVM?) instead of Xen as a platform. I don't know
> how much progress has been made so far, perhaps his offer is still valid.
>
> In addition: Please do not only hope. This stuff is open-source. I guess every
> help in fixing is appreciated.
>
>> BTW, the multicore simulation is not yet cycle accurate! And if you're doing
>> single core full-system simulations you're probably OK, with both stability
>> and accuracy.
>
> Neither is the single-core. I have a patch upcoming that adds true
> multiple cores
> and a _minimal_ coherency protocol. Stay tuned!
>
> Cheers,
> Stephan
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