[PTLsim-devel] [PATCH] Buggy decoding of cachelevel information for prefetches

Fri Sep 14 10:04:49 EDT 2007

Hi,
  there is a bug with decoding the prefetch instructions:
The cachelevel is written into the datatype field, rather than into the 
cachelevel field of the TransOp, as the datatype is omitted from the call to 
operand_load in decode_fast , line 824 and decode_complex, line 1687.

Although I believe that one could overload the field like that, it is the 
cachelevel entry that is later passed on to the caches!

This bug has been present in releases 221 and 220, the attached patch should 
fix them! Note, that this will not change anything operational, as the 
cachelevel is not yet accounted for in the caches prefetcher.

Signed-off by stephan.diestelhorst at amd.com

Thanks,
  Stephan
-- 
Stephan Diestelhorst, AMD Operating System Research Center
stephan.diestelhorst at amd.com, Tel.   (AMD: 8-4903)
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